The present invention relates to a large scale integrated circuit (LSI), more specifically, a large scale integrated circuit having a test circuit for conducting a direct current test of an outer terminal.
Tests of an LSI include a function test for checking a logic function of a circuit and a direct current test for checking leak and a voltage level of an outer input terminal or an outer output terminal.
FIG. 2 is a view showing a configuration of the direct current test of an LSI. An LSI 1 to be tested includes a logic circuit 2; a power source terminal 3 for supplying a power source voltage VDD to the logic circuit 2; a ground terminal to be connected to a common ground potential GND; a plurality of input terminals 5 for receiving an input signal; and a plurality of output terminals 6 for outputting a result of a logic process. An LSI may include an input/output terminal to be switched between an input terminal and an output terminal according to an operational state, thereby reducing the number of the outer terminals. In the direct current test, the input/output terminal is separately tested as the input terminal or the output terminal.
As shown in FIG. 2, the input terminal 5 to be tested is connected to a variable voltage source VR capable of outputting an input voltage VI in a range between the ground potential GND and the power source voltage VDD; and a voltage meter VM1 for measuring the input voltage VI. When a level of the input voltage VI changes between levels H and L, an output level at the output terminal 6 changes from level H to level L, or from level L to level H. The output terminal 6 is connected to a voltage meter VM2 for measuring an output voltage VO. The output terminal 6 is further connected to a current source I1 through a switch SW1 for supplying an output current IL flowing from the power source voltage VDD at the level L; and a current source I2 through a switch SW2 for retrieving an output current IH at the level H.
With the configuration described above, when the input voltage test of the input terminal 5 is conducted, the switches SW1 and SW2 are turned off, and the input voltage VI applied to the input terminal 5 is increased from the ground potential GND to the power source voltage VDD. The input voltage is measured and set as a low level input voltage VIL just before the logic level of the corresponding output terminal 6 changes. Then, the input voltage VI applied to the input terminal 5 is decreased from the power source voltage VDD to the ground potential GND. The input voltage is measured and set as a high level input voltage VIH just before the logic level of the corresponding output terminal 6 changes.
When the output voltage test of the output terminal 6 is conducted, the switches SW1 and SW2 are turned off, and the input voltage VI is set so that the out put terminal 6 outputs the specific level L. Then, the switch SW1 is turned on, and the output voltage is measured and set as a low level output voltage VOL. Then, in a state that the switches SW1 and SW2 are turned off, the output terminal 6 outputs the specific level H. In this state, the switch SW2 is turned on, and the output voltage is measured and set as a high level output voltage VOH. When the results are within a specific range, it is determined that the LSI passes the direct current test.
In Patent Reference, an LSI is provided with a test terminal for the direct current test. The LSI is also provided with a switch for sequentially connecting a plurality of test signals for outer connection to the test terminal. Accordingly, even when a LSI tester have test terminals having the number smaller than that of the signal terminals of the LSI, it is possible to conduct the direct current test.
Patent Reference: Japanese Patent Publication No. 2000-162284
In the LSI disclosed in Patent Reference, the input terminal and the output terminal, in which the level of the output signal changes according to the change in the level of the input signal, are combined upon conducting the test. Accordingly, it is necessary to select an optimal combination of the input terminal and the output terminal according to a configuration of a logic circuit, thereby taking long time to set a test condition. Further, it is necessary to concurrently change several levels of the input terminals for changing a single level of the output terminal, thereby taking long time to conduct the test.
In view of the problems described above, an object of the present invention is to provide an LSI having a test circuit capable of conducting the direct current test regardless of a configuration of a logic circuit.
Further objects will be apparent from the following description of the invention.